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ISL55015
Small Outline Transistor Plastic Packages (SC70-6)
0.20 (0.008) M C
CL
VIEW C
P6.049B
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
b
e
MILLIMETERS
SYMBOL
A
MIN
0.80
MAX
1.00
NOTES
-
6
5
4
CL
E1
A1
0.000
0.09
-
CL
E
A2
0.80
0.91
-
1
2
3
b
0.15
0.30
-
b1
c
0.15
0.08
0.25
0.25
-
6
e1
D
CL
C
c1
D
E
E1
0.10
1.85
1.15
0.15
2.25
2.30 BSC
1.35
6
3
-
3
A
A2
A1
SEATING
PLANE
-C-
e
e1
0.65 Ref
1.30 Ref
-
-
0.10 (0.004)
C
L
N
0.21
6
0.44
4
5
Rev. 0 4/07
NOTES:
SEATING
PLANE
WITH
PLATING
c
b
b1
BASE METAL
L
c1
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO203AB.
3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate
burrs.
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
6. These Dimensions apply to the flat section of the lead between 0.08mm
and 0.15mm from the lead tip.
C
VIEW C
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
6
FN6284.2
February 19, 2013
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